Latency and Bandwidth Microbenchmarks of US Department of Energy Systems in the June 2023 Top 500 List

Christopher M. Siefert, Carl Pearson, Stephen L. Olivier, Andrey Prokopenko, Jonathan J. Hu, Timothy J. Fuller
14th IEEE International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems
As a rule, Top 500 class supercomputers are extensively benchmarked as part of their acceptance testing process. However, barring publicly posted LINPACK / HPCG results, most benchmark results are often inaccessible outside the hosting institution. Moreover, these higher level benchmarks do not provide easy answers to common questions such as "What is the realizable memory bandwidth?" or "What is the launch latency on the accelerator?" To partially address these issues, we executed selected single-node micro-benchmarks - focused on latencies and memory bandwidth - on every US Department of Energy system above rank 150 of the June 2023 Top 500 list, excepting NERSC's Cori and ORNL's Frontier TDS (now decommissioned or repurposed). We hope to provide an easy "first stop" reference for users of current Top 500 systems and inspire users and administrators of other Top 500 systems to similarly compile and make available benchmark results for their systems.